#include "wb_skel_slave.h"

//////////////////////////////////////////
// Status register 
//////////////////////////////////////////
/* 
 */
#define WB_SKEL_SLAVE_STATUS_REG_OFFSET 0 
#define WB_SKEL_SLAVE_STATUS_REG_R  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + STATUS_REG_OFFSET))

// ENABLED 
/* If the core is enabled */
#define WB_SKEL_SLAVE_STATUS_REG_ENABLED_MASK 0x00000001
#define WB_SKEL_SLAVE_STATUS_REG_ENABLED_R  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + STATUS_REG_OFFSET)) & 0x00000001

// ERROR 
/* WB_SKEL general errors */
#define WB_SKEL_SLAVE_STATUS_REG_ERROR_MASK 0x0000000E
#define WB_SKEL_SLAVE_STATUS_REG_ERROR_R  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + STATUS_REG_OFFSET)) & 0x0000000E

// IRQ 
/* WB_SKEL interrupt */
#define WB_SKEL_SLAVE_STATUS_REG_IRQ_MASK 0x00000010
#define WB_SKEL_SLAVE_STATUS_REG_IRQ_R  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + STATUS_REG_OFFSET)) & 0x00000010
#define WB_SKEL_SLAVE_STATUS_REG_IRQ_ISIRQ


//////////////////////////////////////////
// Command register 
//////////////////////////////////////////
/* To send commands to the device */
#define WB_SKEL_SLAVE_COMMAND_REG_OFFSET 8 
#define WB_SKEL_SLAVE_COMMAND_REG_R  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + COMMAND_REG_OFFSET))
#define WB_SKEL_SLAVE_COMMAND_REG_W(int val)  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + COMMAND_REG_OFFSET)) = val;

// FAKE 
/* Fake commands */
#define WB_SKEL_SLAVE_COMMAND_REG_FAKE_MASK 0x00000007
#define WB_SKEL_SLAVE_COMMAND_REG_FAKE_R  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + COMMAND_REG_OFFSET)) & 0x00000007
#define WB_SKEL_SLAVE_COMMAND_REG_FAKE_W(int val)  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + COMMAND_REG_OFFSET)) = val  & 0x00000007;

// ENABLE 
/* Enable the core */
#define WB_SKEL_SLAVE_COMMAND_REG_ENABLE_MASK 0x00000008
#define WB_SKEL_SLAVE_COMMAND_REG_ENABLE_R  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + COMMAND_REG_OFFSET)) & 0x00000008
#define WB_SKEL_SLAVE_COMMAND_REG_ENABLE_W(int val)  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + COMMAND_REG_OFFSET)) = val  & 0x00000008;


//////////////////////////////////////////
// Control register 
//////////////////////////////////////////
/* Control information and commands to the device */
#define WB_SKEL_SLAVE_CONTROL_REG_OFFSET 4 
#define WB_SKEL_SLAVE_CONTROL_REG_R  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + CONTROL_REG_OFFSET))
#define WB_SKEL_SLAVE_CONTROL_REG_W(int val)  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + CONTROL_REG_OFFSET)) = val;

// TEST MODE 
/* Configure the core for the test modes */
#define WB_SKEL_SLAVE_CONTROL_REG_TEST_MODE_MASK 0x0000000F
#define WB_SKEL_SLAVE_CONTROL_REG_TEST_MODE_R  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + CONTROL_REG_OFFSET)) & 0x0000000F
#define WB_SKEL_SLAVE_CONTROL_REG_TEST_MODE_W(int val)  (*((volatile unsigned int *)(WB_SKEL_SLAVE_BASE_ADDRESS + CONTROL_REG_OFFSET)) = val  & 0x0000000F;


